Array作为顶层参数-优化设计(二)

一、核心代码#include array_FIFO.hvoid array_FIFO (dout_t d_o[4], din_t d_i[4], didx_t idx[4]) {//void array_FIFO (dout_t d_o[4], din_t *d_i, didx_t idx[4]) {#pragma HLS INTERFACE s_axilite register depth4 portd_i//#pragma HLS INTERFACE s_axilite register depth4 portd_iint i;// Breaks FIFO interface d_o[3] d_i[2];For_Loop: for (i0;i4;i) {//d_o[i] d_i[idx[i]];d_o[i] *d_i;}}二、TB设计#include array_FIFO.hint main () {din_t d_i[4];dout_t d_o[4];didx_t idx[4];int i, retval0;FILE *fp;// Create input datafor (i0;i4;i) {d_i[i] i10;//idx[i] i;idx[i] 3-i;}// Call the function to operate on the dataarray_FIFO(d_o,d_i,idx);// Save the results to a filefpfopen(result.dat,w);fprintf(fp, Din Dout\n);for (i0;i4;i) {fprintf(fp, %d %d\n, d_i[i], d_o[i]);}fclose(fp);// Compare the results file with the golden resultsretval system(diff --brief -w result.dat result.golden.dat);// if (retval ! 0) {// printf(Test failed !!!\n);// retval1;// } else {// printf(Test passed !\n);// }// Return 0 if the test passes//return retval;return 0;}三、仿真结果总结#pragma HLS INTERFACE s_axilite register depth4 portd_i这条指令将数组作为axilite的4个寄存器在进行处理。四、核心代码换一个方式进行设计#include array_FIFO.hvoid array_FIFO (dout_t d_o[4], din_t d_i[4], didx_t idx[4]) {#pragma HLS ARRAY_PARTITION variabled_i complete dim1#pragma HLS INTERFACE s_axilite portd_i//void array_FIFO (dout_t d_o[4], din_t *d_i, didx_t idx[4]) {#pragma HLS INTERFACE s_axilite register depth4 portd_i//#pragma HLS INTERFACE s_axilite register depth4 portd_iint i;// Breaks FIFO interface d_o[3] d_i[2];For_Loop: for (i0;i4;i) {d_o[i] d_i[i];}}